
Helps improve system performance and efficiency by directly connecting the memory controller and I/O to the CPU.
Designed to enable simultaneous 32- and 64-bit computing
Integrated DDR2 Memory Controller
BENEFITS :
Increases application performance by reducing memory latency
Scales memory bandwidth and performance to match compute needs
HyperTransport™ Technology provides up to 16.0GB/s peak bandwidth per processor—reducing I/O bottlenecks
Up to 33.1GB/s total delivered processor-to-system bandwidth (HyperTransport bus + memory bus)
AMD Balanced Smart Cache
Shared L3 cache
In addition to the 512K L2 cache per core, up to 2MB of L3 cache shared by up to 4 cores.
BENEFIT : Shortened access times to highly accessed data for better performance.
AMD Wide Floating Point Accelerator
128-bit floating point unit (FPU)
High performance (128bit internal data path) floating point unit per core.
BENEFIT : Larger data paths for quicker floating point calculations and better performance.
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